This blog is all about verification of Digital Designs.
Saturday, 8 May 2010
Generic/Parameter support in Mixed HDL Hierarchy Code Generator
I hope this small utility is helpful. I've thought one small enhancement to it. Now, you can select whether you need VHDL Generic or Verilog Parameterized examples code by selecting the checkbox. Please feel free to comment/enhancement. You can visit http://www.sandipgor.com/hdl_gen.html