Following questions are taken from http://www.specman-verification.com/static.php?page=WorkInterviewQuestions. Please refer this page for all the answers.
1) What are the differences between directed testbench and random testbench?
2) Draw the structure of a typical random testbench, describing each of the parts in detail.
3) Why is it important to keep code for generators/scoreboards and code for BFMs separated?
4) Is it a must to have an automatic checker (a scoreboard) in a directed testbench? Is it a must in a random testbench?
5) What is the difference between "protocol checking" and "data checking"? In which part of the testbench should each be done?
6) Which of the parts in the testbench should add data to the scoreboard?
7) What are the advantages and disadvantages of taking scoreboard data from the generator?
8) What are the advantages and disadvantages of taking scoreboard data from the BFM?
9) Suppose you have a scoreboard for a specific block inside the DUT. Will that scoreboard be useful during end to end (or full chip) tests as well? What for?
10) What is the use of the test file? Is it supposed to make the data that is generated by the testbench more or less random?
11) What is the difference between the constraints that are added through the test file, and those constraints that are placed in the environment files themselves?
12) Please explain the difference between declarative code (also known as static code), and sequential code, and give an example of each. What is the major advantage of controlling generation via declarative code? Which of the two is harder to debug?
13) What are test scenarios (also known as sequences)? What are they used for? Do the use of test scenarios makes the testbench more or less random?
14) Please give an example of when a test scenario should be used.
15) At which phase the use of sequences is more common at the beginning, at the middle, or at the end of the verification process?